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8085 Instruction Set: Part 1

Introduction

The 8085 microprocessor, developed by Intel, has a rich set of instructions that allow it to perform a wide range of operations. These instructions can be broadly classified into several categories, each serving a specific purpose in the operation of the microprocessor. Understanding these instructions is crucial for programming the 8085 effectively.

Categories of Instructions

The 8085 instruction set can be divided into the following categories:

  1. Data Transfer Instructions
  2. Arithmetic Instructions
  3. Logical Instructions
  4. Branch Instructions
  5. Stack, I/O, and Machine Control Instructions

1. Data Transfer Instructions

Data transfer instructions are used to move data between registers, between memory and registers, or between I/O ports and the accumulator. These instructions do not alter the data being transferred.

Common Data Transfer Instructions:

Opcode Operand Description
MOV Rd, Rs Copy the contents of the source register (Rs) to the destination register (Rd).
MOV Rd, M Copy the contents of the memory location pointed to by the HL pair to the destination register (Rd).
MOV M, Rs Copy the contents of the source register (Rs) to the memory location pointed to by the HL pair.
MVI Rd, Data Move immediate 8-bit data to the destination register (Rd).
MVI M, Data Move immediate 8-bit data to the memory location pointed to by the HL pair.
LXI Reg. pair, 16-bit data Load immediate 16-bit data into the register pair.
LDA 16-bit address Load the contents of the specified memory location into the accumulator.
STA 16-bit address Store the contents of the accumulator into the specified memory location.
LHLD 16-bit address Load H and L registers directly from the specified memory locations.
SHLD 16-bit address Store H and L registers directly into the specified memory locations.
LDAX B/D Load the accumulator indirectly from the memory location pointed to by the specified register pair (B or D).
STAX B/D Store the contents of the accumulator into the memory location pointed to by the specified register pair (B or D).
XCHG None Exchange the contents of the H and L registers with the contents of the D and E registers.

2. Arithmetic Instructions

Arithmetic instructions perform arithmetic operations such as addition, subtraction, increment, and decrement on the data in registers or memory.

Common Arithmetic Instructions:

Opcode Operand Description
ADD R Add the contents of the specified register (R) to the accumulator.
ADD M Add the contents of the memory location pointed to by the HL pair to the accumulator.
ADI Data Add immediate 8-bit data to the accumulator.
ADC R Add the contents of the specified register (R) to the accumulator along with the carry flag.
ADC M Add the contents of the memory location pointed to by the HL pair to the accumulator along with the carry flag.
ACI Data Add immediate 8-bit data to the accumulator along with the carry flag.
SUB R Subtract the contents of the specified register (R) from the accumulator.
SUB M Subtract the contents of the memory location pointed to by the HL pair from the accumulator.
SUI Data Subtract immediate 8-bit data from the accumulator.
SBB R Subtract the contents of the specified register (R) and the borrow flag from the accumulator.
SBB M Subtract the contents of the memory location pointed to by the HL pair and the borrow flag from the accumulator.
SBI Data Subtract immediate 8-bit data and the borrow flag from the accumulator.
INR R Increment the contents of the specified register (R) by 1.
INR M Increment the contents of the memory location pointed to by the HL pair by 1.
DCR R Decrement the contents of the specified register (R) by 1.
DCR M Decrement the contents of the memory location pointed to by the HL pair by 1.
INX Reg. pair Increment the contents of the specified register pair by 1.
DCX Reg. pair Decrement the contents of the specified register pair by 1.
DAD Reg. pair Add the contents of the specified register pair to the contents of the HL pair.
DAA None Decimal adjust the accumulator.

3. Logical Instructions

Logical instructions perform bitwise logical operations such as AND, OR, XOR, and complement on the data in registers or memory.Common Logical Instructions:

Opcode Operand Description
ANA R Logical AND the contents of the specified register (R) with the accumulator.
ANA M Logical AND the contents of the memory location pointed to by the HL pair with the accumulator.
ANI Data Logical AND immediate 8-bit data with the accumulator.
XRA R Logical XOR the contents of the specified register (R) with the accumulator.
XRA M Logical XOR the contents of the memory location pointed to by the HL pair with the accumulator.
XRI Data Logical XOR immediate 8-bit data with the accumulator.
ORA R Logical OR the contents of the specified register (R) with the accumulator.
ORA M Logical OR the contents of the memory location pointed to by the HL pair with the accumulator.
ORI Data Logical OR immediate 8-bit data with the accumulator.
CMP R Compare the contents of the specified register (R) with the accumulator.
CMP M Compare the contents of the memory location pointed to by the HL pair with the accumulator.
CPI Data Compare immediate 8-bit data with the accumulator.
CMA None Complement the contents of the accumulator.
CMC None Complement the carry flag.
STC None Set the carry flag.
RLC None Rotate the contents of the accumulator left through the carry flag.
RRC None Rotate the contents of the accumulator right through the carry flag.
RAL None Rotate the contents of the accumulator left.
RAR None Rotate the contents of the accumulator right.

Examples of Data Transfer Instructions

  1. MOV Instruction:
    • MOV A, B: Copies the contents of register B into register A.
    • MOV M, A: Copies the contents of the accumulator into the memory location pointed by the H-L pair.
  2. MVI Instruction:
    • MVI A, 0x32: Loads the immediate value 0x32 into register A.
    • MVI M, 0x45: Loads the immediate value 0x45 into the memory location pointed by the H-L pair.
  3. LDA and STA Instructions:
    • LDA 2500H: Loads the contents of memory location 2500H into the accumulator.
    • STA 2500H: Stores the contents of the accumulator into memory location 2500H.
  4. LXI Instruction:
    • LXI H, 2500H: Loads the immediate value 2500H into the H-L pair.
  5. LDAX and STAX Instructions:
    • LDAX B: Loads the contents of the memory location pointed by the B-C pair into the accumulator.
    • STAX D: Stores the contents of the accumulator into the memory location pointed by the D-E pair.

Examples of Arithmetic Instructions

  1. ADD Instruction:
    • ADD B: Adds the contents of register B to the accumulator.
  2. ADI Instruction:
    • ADI 0x12: Adds the immediate value 0x12 to the accumulator.
  3. SUB Instruction:
    • SUB C: Subtracts the contents of register C from the accumulator.
  4. SUI Instruction:
    • SUI 0x10: Subtracts the immediate value 0x10 from the accumulator.
  5. INR and DCR Instructions:
    • INR A: Increments the contents of register A by one.
    • DCR B: Decrements the contents of register B by one.
  6. INX and DCX Instructions:
    • INX H: Increments the contents of the H-L pair by one.
    • DCX D: Decrements the contents of the D-E pair by one.
  7. DAD Instruction:
    • DAD B: Adds the contents of the B-C pair to the H-L pair.

Summary

In this part of the reading material, we have covered the first three categories of the 8085 instruction set: Data Transfer Instructions, Arithmetic Instructions, and Logical Instructions. These instructions form the core of the operations that the 8085 microprocessor can perform, allowing it to manipulate data, perform calculations, and execute logical operations.In the next part, we will explore the remaining categories: Branch Instructions and Stack, I/O, and Machine Control Instructions. Understanding these instructions will provide a comprehensive view of the capabilities of the 8085 microprocessor.

To enhance understanding, below are the lecture videos that may help in completing the lab assignment.

 

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Introduction to Microcontrollers Copyright © 2024 by Lake Washington Institute of Technology is licensed under a Creative Commons Attribution 4.0 International License, except where otherwise noted.